专利摘要:
Provided is a communication interface device that increases the communication distance, improves the influence on the power receiving circuit and the transmission / reception circuit, and economics the device. The transmission / reception circuit constitutes a balanced circuit which improves the driving capability so that sufficient amplitude is ensured even at a low reception voltage. A low pass filter (LPF) is installed at the front of the power receiver circuit to eliminate electrical interference between the power receiver circuits. The LPF is connected to the plus terminal and the minus terminal of the power receiving circuit. Bypass capacitance or a constant voltage element is used for LPF.
公开号:KR20000076876A
申请号:KR1020000013286
申请日:2000-03-16
公开日:2000-12-26
发明作者:고지마야스유끼;가네까와노부야스;다께우찌유우스께;유꾸다께세이고;네모또미네히로
申请人:가나이 쓰토무;가부시키가이샤 히타치세이사쿠쇼;
IPC主号:
专利说明:

Communication interface device {COMMUNICATION INTERFACE APPARATUS}
The present invention relates to a communication interface device suitable for receiving power from a communication line for operation.
BACKGROUND ART A communication device (called a terminal) that operates by receiving electric power from a communication line (called a faucet) is used in a telephone apparatus or a modem device for a telephone line. This electric power is supplied from a subscriber line interface placed in a single station EO (hereinafter simply referred to as a station) (called power supply). For this reason, when the terminal is far from the station, there is a possibility that the received voltage is reduced and cannot be used due to the loss of the subscriber line. An IC telephone is known as a circuit of a terminal.
A conventional communication interface is shown in FIG. In Fig. 9, reference numeral 1 denotes a diode bridge having a terminal connected to a telephone line, reference numeral 2 denotes a high pass filter (HPF) having a terminal on one side connecting the output terminal of the diode bridge. No. 3 is a transmitting / receiving means in which a terminal of one side is connected to the HPF and a terminal of the other side is a connection terminal to a signal processing apparatus, and a reference numeral 4 is a power receiving means for receiving a diode bridge output and supplying a stabilized DC output to the transmitting and receiving means. to be.
The diode bridge 1 incorporates four diodes, and generally refers to an AC input side as a terminal on the telephone line side, and a DC output side as a terminal on the opposite side.
The HPF 2 exhibits HPF characteristics in combination with the termination resistors of the counterpart terminals connected to the transmission / reception circuits or lines with a capacitor 21 of about 1 kHz.
The transmission / reception means 3 consists of the transmission amplifier 31, the reception amplifier 32, the transmission termination resistor 33, and the input resistors 34 and 35, and it connects as shown in the figure, and shows the 2-wire 4-wire conversion function. .
The power receiving means 4 includes a small capacity input capacitor 41 that does not affect the characteristics of the transmission and reception means 3, a large capacity output capacitor 42 of about 1 kHz, a resistor 43, and a zener diode 44. It consists of).
In the power receiving means, the transmission signal is alternating current and the signal termination circuit is unbalanced. That is, the other line is driven in transmission on the basis of one of the two lines of the balanced line, and the reception signal is detected from the other line in reception.
Since the amplitude of the transmission output signal of the transmission / reception means 3 is generally smaller than the power supply voltage, when the terminal is far from the station, only the low voltage can receive power, and the range in which communication can be limited.
In addition, the power receiving means stabilizes the output voltage with a capacitor of about 1 kHz, but is limited to applications such as telephone calls due to stability and noise characteristics.
In addition, the application of a high-performance voltage regulator circuit is effective in stabilizing the output voltage, or increasing the output capacitor of the power receiving means can increase the stability of the output voltage. In the signal frequency region of ", the input impedance of the power supply is smaller than the transmission termination impedance, and the output signal of the transmission / reception means 3 is absorbed by the power supply and signal transmission cannot be performed.
In addition, although the voltage regulator is IC and widely used as a three-terminal regulator, etc., in these applications, since the input voltage of a power receiving means changes with the distance between a terminal and a station, it cannot be used alone.
The spread of public communication is surprising and it is required to further expand the range of communication services, that is, increase the communication distance. In order to increase the communication distance, the transmission amplitude may be increased. In order to increase the transmission amplitude, it is good to increase the power supply voltage. However, there is a limit in the related art in a terminal operated by stationary power.
SUMMARY OF THE INVENTION An object of the present invention is to provide a communication interface device having power receiving means for improving communication performance in view of the above problem.
In the communication interface device according to the present invention, the following means are used alone or in combination.
In the transmission / reception means, an amplitude can be obtained even if the power receiving voltage is low by using a balanced circuit.
By adding the LPF to the front end of the power receiving circuit, the input impedance frequency characteristics of the power receiving means are improved in order to eliminate electrical interference between the power receiving means and the transmitting and receiving means.
In a balanced circuit, an LPF is connected to both positive and negative inputs of a power receiving circuit, and a bypass capacitor can be shared to provide a circuit having excellent balance of operating characteristics.
By the LPF using the Zener diode, a stabilization circuit having a two-stage configuration can be used, even when the input voltage of the power receiving circuit is high.
1 is a functional block diagram of a communication interface device according to an embodiment of the present invention.
2 shows frequency characteristics of an input impedance.
3 is a circuit diagram of a communication interface device representing an embodiment of the present invention.
4 is another circuit diagram of an embodiment of the invention.
5 is another circuit diagram of an embodiment of the invention.
6 is another circuit diagram of an embodiment of the invention.
7 is a functional block diagram of another embodiment of the present invention.
8 is a functional block diagram of another embodiment of the present invention.
9 shows a conventional example.
10 is a circuit diagram according to another embodiment of the present invention.
<Explanation of symbols for main parts of drawing>
1: telephone line
2: diode bridge
3: transmission and reception means
5: LPF (Low Pass Filter)
6: voltage regulator
Hereinafter, embodiments of the present invention will be described.
1 is a functional block diagram of an embodiment of the present invention, and is a functional block diagram of a line interface circuit for connecting with a telephone line in a modem apparatus. In addition, in the following embodiment, description is abbreviate | omitted about a protection means and a DC termination means.
In Fig. 1, reference numeral 1 denotes a diode bridge having a terminal connected to a telephone line, reference numeral 2 denotes a high pass filter (HPF) having a terminal connected to an output terminal of the diode bridge 1, Reference numeral 3 denotes a transmission / reception means in which one terminal is connected to the HPF 2, and the other terminal is a connection terminal to the signal processing apparatus, and reference number 5 is an LPF (Low) outputting a DC portion by receiving the output of the diode bridge. Pass Filter) and reference numeral 6 denote voltage regulators (stabilization power supplies) for supplying a stabilized DC output to the transmission / reception means 3, and constitute a power receiving circuit with the LPF 5 and the voltage regulator 6. The diode bridge 1 and the HPF 2 are almost the same as before. In addition, the protection circuit is abbreviate | omitted. Also in this circuit, an alternating current transmission signal in which a DC voltage is superimposed is input to the telephone line.
The characteristics of the circuit will be described with reference to FIG. Fig. 2 shows the frequency characteristics of the input impedances of the HPF 2, the LPF 5, and the power supply 7, where Z1 is the passband impedance of the HPF, which is the terminal impedance of the telephone line, the minimum of which is 600 Ω. Z2 is the band-band impedance value of the LPF (5), which is several tens or more, Z3 is the band-band impedance value of the LPF (5), and the unit characteristic is several Ω or less, and Z4 is the DC impedance of the power source, which is several hundreds or more. Z5 is the input impedance of the power supply near the signal frequency. 2 shows the cutoff frequency fc, and the cutoff frequency fc1 of the HPF 2 and the cutoff frequency fc2 of the LPF 6 are set sufficiently low (about 1/100 or less) than the cutoff frequency fc3 of the voltage regulator 7. do. When the impedance in the line direction is observed from the transmission / reception means 3 in this connection relationship, the impedance connected to the diode bridge 1, the telephone line and the station via the HPF 2, and the LPF 5 and the voltage regulator 6 You can see the parallel impedance with the cascaded impedance.
According to the same configuration and characteristics as in this embodiment, since the impedance observed from the transmission / reception means 3 becomes the impedance value of the line load passing through the HPF 2, the output of the transmission / reception means 3 is received in the low frequency band. The phenomenon that the circuit is loaded and absorbs the transmitted signal does not occur.
3 is a circuit diagram of an embodiment of the present invention. In Fig. 3, reference numeral 1 denotes a diode bridge, reference numeral 2 denotes an HPF, reference numeral 3 denotes a transmission / reception means, reference numeral 5 denotes an LPF, and reference numeral 6 denotes a voltage regulator. The diode bridge is a Schottky barrier diode, which reduces the on voltage to about 1/2 of a normal rectifier diode. In addition, the HPF 2 inserts 10, capacitors 21 and 22 between the input and output lines. The transmission / reception means 3 consists of the transmission amplifiers 311 and 312, the complementary signal generation circuit 313, the reception amplifiers 314 and 315, the operational amplifier 316, and the resistors 317-321. The resistors 317 and 320 drive both sides of the two-wire line with the transmission amplifiers 311 and 312 as terminating resistors of 300 kHz (this is called balanced driving). An input signal of the transmission amplifiers 311 and 312 is a complementary signal, which is generated by inputting a transmitter signal by a complementary signal generator. The values of the resistors 318 and 319 are 20 Hz, and have a function of inducing a receive signal to one terminal of the receive amplifier, and the resistors 321 and 322 guide the transmit signal to the other terminals of the receive amplifiers 314 and 315. Having a function, the receive amplifiers 314 and 315 operate to remove the transmitted signal from the received signal when impedance matching with the line side is taken. The outputs of the receive amplifiers 314 and 315 are subtracted by the operational amplifier 316 to remove common mode noise to form a receive output signal. The LPF 5 is an LPF circuit composed of a transistor 51, a common bypass capacitor 52 of about 1 kW, a transistor 53, and several resistors 54, 55. The side enters. The cutoff frequency fc2 of the LPF 5 can be determined by designing the time constants of the resistor 54 or 55 and the capacitance 52. The output of the LPF 5 is input to the voltage regulator 6. The voltage regulator 6 consists of a zener diode 62 for generating a reference voltage of the transistor 61, a bias resistor 63 of about 100 kohms, and an output capacitance 64 of about 50 kohms.
The operation of the stabilizing power supply circuit is well known and the details thereof are omitted. However, the cutoff frequency of the impedance seen from the input terminal of the power supply circuit is as low as about 100 Hz, and only 10 Ω in the signal frequency band of the voice or modem. However, since the cutoff frequencies of the HPF 2 and the LPF 5 are several kilohertz, the impedance of the power receiving circuit seen from the transmission / reception means 3 is high in the vicinity of a direct current of several kilohertz or less and the HPF 2 and the voltage regulator 6 are high. Since the impedance of the cut-off band of the LPF 5 is seen in the impedance of the signal frequency band or more, the power receiving circuit does not affect the operation of the transmission / reception means 3.
In addition, when the transmission / reception means 3 is a balanced circuit, if the internal circuits of the transmission / reception amplifiers are the same, a transmission output twice that of the unbalanced circuit can be obtained at the same power supply voltage. It is conventionally known that a balanced circuit exhibits such a characteristic, but an example in which a balanced LPF circuit is applied to a circuit that receives electric power from a line and supplies it to a transmission / reception circuit is not known.
In the LPF of the balanced circuit, the positive and negative inputs of the power receiving circuit are used as the common LPF, but the bypass signal acts on the circuit on the opposite side, thereby providing excellent operation balance characteristics. And an economical circuit can be constructed.
Although the voltage regulator 6 has shown the simplest example in this embodiment, the control transistor having good controllability with another high amplification factor, the reference voltage source having good precision and temperature characteristics, and the difference between the output voltage and the set voltage are detected. An error amplifier method for adjusting the control transistor, and a high-performance circuit having a protection circuit for detecting a voltage or overcurrent and protecting a circuit around it, can also be applied, and the form may be discrete or integrated.
In this embodiment, the protection circuit is omitted.
FIG. 4 is another circuit diagram of the embodiment of the present invention, except for the LPF 5 in FIG. 4, each symbol has the same function as that of FIG. The LPF 5 is characterized by connecting the bypass capacitor 52 in Fig. 3 to a Zener diode (constant voltage element) having a breakdown voltage of 12V and connecting a small output capacitor 57 of about 10 Hz. In this manner, since the output voltage 12V and the cutoff frequency fc3 are high, in addition to the LPF characteristics, the input voltage specification of the voltage regulator 6 can be reduced.
5 is another circuit diagram of an embodiment of the present invention, in which each reference numeral in FIG. 5 has the same function as that in FIG. The characteristic of this circuit is an unbalanced circuit type, in which the negative side of the output of the diode bridge 1 is commonly connected by the HPF 2, the transmission / reception means 3, the LPF 5, and the voltage regulator 6. will be. In this way, the HPF 2, the transmission and reception means 3, and the LPF 5 need only be applied to the positive side of the diode bridge, thereby reducing the number of circuit elements. However, although the transmission / reception means 3 are inferior to the balanced circuit, the driving capability is improved according to other methods, such as a BiCMOS device, a rail-to-rail amplifier circuit, or the distance from the station. If it is applied to a short line, there is no problem.
Moreover, although the choke coil circuit which wound the electric wire in the core material (core) as a realization method of LPF, what is called the electronic choke coil circuit using a transistor, a resistor, and a capacitor is known outside. (Page 76 of Fig. 5, Fig. 5 (d), JP-A-9-200388, of the design of the stabilized power supply circuit in the third edition of April 20, 1972, published by CQ Publishing Company.).
6 is another circuit diagram of an embodiment of the present invention, in which each reference numeral in FIG. 6 has the same function as that of FIG. The LPF 5 uses the bypass capacitor 52 in Fig. 5 as a Zener diode (constant voltage element) having a breakdown voltage of 12V, and is connected with a small output capacitance 57 of about 10 kHz. In this manner, since it operates as a high stabilizing power supply having an output voltage of 12 V and a cutoff frequency fc3 in addition to the characteristics of LPF, the input voltage specification of the voltage regulator 6 can be reduced.
7 is a functional block diagram of another embodiment, in which reference numerals 1 to 3 denote the same names and functions as those in FIG. Reference numeral 7 is an improved voltage regulator, so that if one circuit having both an LPF and a voltage regulation function can be realized, such a circuit block diagram becomes a simple configuration, and is suitable as a unit for ICization or modularization.
8 is a functional block diagram of still another embodiment of the present invention, in which the present invention is used in a modem system. In Fig. 8, reference numerals 1 to 6 denote the same functions as those in Fig. 1, reference numeral 8 denotes a voice codec incorporating an analog to digital converter (ADC) and a digital to analog converter (DAC), and reference numeral 9 denotes an input terminal. Isolator capable of transmitting signals while isolating between the output and output terminals, reference numeral 110 denotes a digital filter, reference numeral 120 denotes a host central processing unit such as a digital signal processor (DSP) or a reduced instruction set processor (RISC) including a power supply. Signal processing means, denoted by), reference numerals 15 and 16 are surge absorption capacitors, and ground terminal FG is frame ground.
An isolator is a circuit block having the function of electrically insulating between two circuits and coupling signalically. An isolator can be used to construct an analog front end without the use of an isolated transformer. An analog front end (AFE) is an interface circuit for a signal processing device and generally includes an ADC (means for converting analog signals to digital signals), a DAC (means for converting digital signals to analog signals), or any one of them. , A circuit including a band filter means, a level adjusting means and the like, and is used for a line interface circuit of a modem. In the field of communication, high insulation is required at the boundary between the network and the terminal (hereinafter referred to as a line interface) for the protection of network equipment with high publicity and the protection of terminals, and a small transformer for communication with high insulation is conventionally used. come. However, due to the widespread development of personal terminals, further miniaturization and weight reduction are required for portable terminals, and improvements in materials and structures used in transformers have caused problems that do not sufficiently comply with the requirements for miniaturization. It is considered. In addition, there are cases where it is necessary to insulate a signal detection portion such as a sensor, a signal processing circuit, and a signal processing portion for applications such as measurement, medical care, and the like.
Although the characteristic required for an isolator differs, the insertion position does not matter between reference numbers 3 and 8, too. In addition to the reference numerals 1 to 6, the circuits on the telephone line side of the reference numerals 8 and 9 are also connected to operate with the power output from the power receiving circuit 6.
When transmitting in this system, the terminal on the Telephone Line side is connected to the telephone line, the signal processing means 120 is turned on, and the digital signal 110 is used to generate a digital modulated signal. The uplink channel, the uplink channel of the isolator 9, and the DAC of the codec (codec: 8) form an analog transmission signal and are input to the transmitter data terminal of the transmission / reception means 3. In this way, the circuits on the line side of the reference numerals 1 to 8 can be operated, and as described with reference to Fig. 1, the transmission signal is efficiently sent out to the telephone line. When receiving the same connection even when receiving, the received signal input to the terminal on the Telephone Line side appears in the Receive Data terminal as described in Fig. 1, so that it is made of a digital signal from the ADC of the codec 8, and the isolator 9 The received data can be received through the demodulation process or the like by inputting to the signal processing unit 120 via the down channel of the digital filter 110 and the down channel of the digital filter 110.
FIG. 10 is a circuit diagram of still another embodiment of a modem according to the present invention, and reference numerals 1 to 322 in FIG. 10 have the same names and functions as those in FIG. Reference numeral 130 is a DC termination circuit, reference numerals 131 to 133 are resistors, reference numeral 134 is a capacitor, and reference numeral 135 is a transistor. The DC termination circuit itself is a known circuit block. The transistor 135 selects and uses a characteristic having a large amplification factor. The resistors 131 and 132 are bias circuits of this transistor, and a capacitor 134 is further connected to the resistor 132. Resistor 133 is the load of transistor 135. The operation of the DC termination circuit 130 flows only DC current when a certain amount of voltage is applied when the modem is connected to the line, and operates as shown in the high impedance for the T transmission signal which is AC. Being in a high impedance characteristic for alternating current depends on the amplification factor of the capacitor 134 and the transistor 135.
This is similar to the LPF means described above. Therefore, since the AC impedance characteristic can be relaxed by arranging the DC termination means between the LPF means and the power receiving means as in this embodiment, the capacitance 134 is omitted or satisfies a small value. That is, it contributes to size and cost reduction.
In addition, there may be a method of fusing the DC termination circuit with the LPF means or the power receiving circuit. Even in this case, the effects contributing to the miniaturization and cost reduction remain unchanged.
As described above, according to the present invention, as a circuit system with high driving capability, an output voltage having a large amplitude can be obtained even by a balanced driving circuit, a BiCMOS device, or a rail-to-rail driving circuit even if the power receiving voltage is low. In addition, by adding the LPF to the power receiving circuit, the input impedance frequency characteristic of the power receiving circuit can be improved, and the output characteristic of the transmitting and receiving means can be improved. In the balanced drive circuit, LPF is applied to both the positive and negative inputs of the power receiving circuit, and a bypass capacitor can be shared to provide a circuit excellent in operating characteristic balance and economical. In addition, by using a LPF using a zener diode as a stabilization circuit having a two-stage configuration, even when the input voltage of the power receiving circuit is high, it is possible to realize an economical circuit using an IC voltage regulator.
In addition, by disposing the direct current terminating means between the LPF means and the power receiving means, it contributes to size and cost reduction.
权利要求:
Claims (11)
[1" claim-type="Currently amended] A communication interface device having transmission and reception means for transmitting and receiving a signal with a communication line and power receiving means for receiving power from the communication line and providing power to a terminal circuit.
And an interference preventing means for preventing electrical interference between the power receiving means and the transmitting and receiving means.
[2" claim-type="Currently amended] The method of claim 1, wherein the interference prevention means
As seen from the transmission and reception means, a low pass filter (LPF) is connected to the power reception means and a high pass filter (HPF) means to the transmission and reception means to a portion where the communication line and the power reception means are connected in parallel.
And fc1 and fc2 are smaller than fc3 when the cutoff frequency of the HPF is fc1, the cutoff frequency of the LPF is fc2, and the cutoff frequency of the stabilization circuit in the power receiving means is fc3.
[3" claim-type="Currently amended] The method of claim 2,
And the HPF is a circuit based on line impedance and DC cut capacitance.
[4" claim-type="Currently amended] The method of claim 2,
And the HPF and the LPF are arranged in a balanced manner with the transmission and reception means as a balanced circuit.
[5" claim-type="Currently amended] The method of claim 2,
The LPF includes a transistor, a bias resistor, and a bypass capacitance, and inputs a collector of the transistor and an emitter as an output, and connects between the base and the collector of the transistor with the bias resistor, and further bypasses the bypass. And a capacitor connected to the base of the transistor and another input of the LPF.
[6" claim-type="Currently amended] The method of claim 5,
A communication interface device comprising the transmitting and receiving means as a balanced circuit and sharing a bypass capacity.
[7" claim-type="Currently amended] The method of claim 2,
The LPF includes a transistor, a bias resistor, and a constant voltage element, the collector of the transistor is input, the emitter is output, the bias resistor is connected between the base and the collector of the transistor, and the constant voltage element is connected to the A communication interface device which is connected to a transistor base and another input of an LPF.
[8" claim-type="Currently amended] The method of claim 7, wherein
A communication interface device characterized in that the constant voltage element is common with the transmitting and receiving means being a balanced circuit and the LPF circuit being balanced.
[9" claim-type="Currently amended] The method of claim 1,
An analog filter, an analog-to-digital conversion circuit, a digital filter, and a signal processing unit are connected in series to the signal processing unit connection side of the transmission / reception unit in order, and an isolator is disposed on any one of these circuits and the signal processing side. And isolating the circuit and supplying electric power to the circuit on the line side of the isolator by the power receiving means.
[10" claim-type="Currently amended] The method of claim 9,
And a DC termination means between the LPF and the power receiving means, or any one of them, in a circuit on the line side of the isolator.
[11" claim-type="Currently amended] A communication interface device having means for receiving electric power from a line, transmitting and receiving means for driving a line to transmit a signal, and means for cutting off a DC voltage to couple the line and the transmitting and receiving means,
At least the transmitting and receiving means is a balanced circuit.
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同族专利:
公开号 | 公开日
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引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题
法律状态:
1999-05-26|Priority to JP11145974A
1999-05-26|Priority to JP1999-145974
2000-03-16|Application filed by 가나이 쓰토무, 가부시키가이샤 히타치세이사쿠쇼
2000-12-26|Publication of KR20000076876A
优先权:
申请号 | 申请日 | 专利标题
JP11145974A|JP2000341181A|1999-05-26|1999-05-26|Communication interface device|
JP1999-145974|1999-05-26|
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